UPSD3354DV-40U6 Datasheet, PDF (261/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx
Figure 94. Peripheral I/O READ timing
ALE
DC and AC parameters
A /D BUS
CSI
RD
ADDRESS
tAVQV (PA)
tSLQV (PA)
tRLQV (PA)
DATA VALID
tRHQZ (PA)
tDVQV (PA)
t(s) ^{DATA ON PORT A}
AI06610
duc _{Table 183. Port A peripheral data mode READ timing (5 V PSD module)}
Pro ^Symbol
Parameter
Conditions
Min
Max
Turbo
off
te _{tAVQV–PA Address valid to data valid}
(1)
ole ^tSLQV–PA ^{CSI valid to data valid}
bs ^{tRLQV–PA RD to data valid}
(2)
O t_DVQV–PA Data In to data out valid
) ^{- tRHQZ–PA RD to data high-Z}
37
+ 10
27
+ 10
32
22
23
t(s ^{1. Any input used to select Port A Data Peripheral mode.}
c ^{2. Data is already stable on Port A.}
Unit
ns
ns
ns
ns
ns
rodu ^{Table 184. Port A peripheral data mode READ Timing (3 V PSD module)}
P Symbol
Parameter
Conditions Min Max Turbo off Unit
tet_AVQV–PA Address valid to data valid
(1)
le_{tSLQV–PA CSI valid to data valid}
so _{tRLQV–PA RD to data valid}
(2)
Ob ^{tDVQV–PA Data In to data out valid}
50
+ 15 ns
37
+ 15 ns
45
ns
38
ns
t_RHQZ–PA RD to data high-Z
36
ns
1. Any input used to select Port A Data Peripheral mode.
2. Data is already stable on Port A.
Doc ID 9685 Rev 7
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