UPSD3354DV-40U6 Datasheet, PDF (42/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

Special function registers (SFR)
UPSD33xx
Table 5. SFR memory map with direct address and reset value (continued)
SFR
addr
SFR
(hex)
name
7
6
Bit name and <Bit Address>
5
4
3
2
1
0
Reset
value
(hex)
Reg. descr.
with link
9C
RESERVED
9D BUSCON
EPFQ
EBC
WRW1
WRW0
RDW1 RDW0
CW1
CW0
EB
Table 47 on
page 87
9E
RESERVED
9F
RESERVED
A0
RESERVED
A1
RESERVED
A2 PCACL0
PCACL0[7:0]
00
Table 98 on
page 154
A3 PCACH0
PCACH0[7:0]
00
Table 98 on
page 154
A4 PCACON0 EN_ALL EN_PCA EOVF1 PCA_IDL
–
–
CLK_SEL[1:0]
00
Table 103 on
page 159
t(s) ^{A5 PCASTA}
OVF1
INTF5
INTF4
INTF3
OVF0
INTF2
INTF1 INTF0
00
Table 107 on
page 161
c ^{A6 WDTRST}
WDTRST[7:0]
00
Table 52 on
page 92
du _A7
IEA
EADC
ESPI
EPCA
ES1
–
–
EI2C
–
00
Table 21 on
page 65
Pro ^A8(1)
IE
EA
<AFh>
–
ET2
<ADh>
ES0
<ACh>
ET1
<ABh>
EX1
<AAh>
ET0
EX0
<A9h> <A8h>
00
Table 19 on
page 65
te _A9
TCMMODE
0
EINTF
E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
00
ole _AA
TCMMODE
1
EINTF
E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
00
Table 109 on
page 162
bs _AB
TCMMODE
2
EINTF
E_COMP CAP_PE CAP_NE MATCH TOGGLE
PWM[1:0]
00
) ^{- O AC}
CAPCOML
0
t(s AD
CAPCOMH
0
CAPCOML0[7:0]
CAPCOMH0[7:0]
00
Table 98 on
page 154
00
duc ^{AE WDKEY}
WDKEY[7:0]
55
Table 50 on
page 92
ro _AF
CAPCOML
1
CAPCOML1[7:0]
00
Table 98 on
page 154
te ^{P B0(1)}
P3
P3.7
<B7h>
P3.6
<B6h>
P3.5
<B5h>
P3.4
<B4h>
P3.3
<B3h>
P3.2
<B2h>
P3.1
P3.0
<B1h> <B0h>
FF
Table 35 on
page 81
ole ^B1
CAPCOMH
1
CAPCOMH1[7:0]
00
Obs^B2
CAPCOML
2
CAPCOML2[7:0]
00
Table 98 on
page 154
B3
CAPCOMH
2
CAPCOMH2[7:0]
00
B4
PWMF0
PWMF0[7:0]
00
B5
RESERVED
B6
RESERVED
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Doc ID 9685 Rev 7