UPSD3354DV-40U6 Datasheet, PDF (210/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

PSD module
UPSD33xx
Table 132. MCU I/O Mode Port A Data In register (address = csiop + offset 00h)⁽¹⁾⁽²⁾
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
1. Port A not available on 52-pin UPSD33xx devices
2. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’
Table 133. MCU I/O Mode Port B Data In register (address = csiop + offset 01h)⁽¹⁾
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
1. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’
Table 134. MCU I/O Mode Port C Data In register (address = csiop + offset 10h)⁽¹⁾⁽²⁾
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PC7
X
X
PC4
PC3
PC2
X
X
t(s) ^{1. X = Not guaranteed value, can be read either '1' or '0.'}
c 2. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’
rodu ^{Table 135. MCU I/O Mode Port D Data Inregister (address = csiop + offset 11h)(1)(2)}
P Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
te X
X
X
X
X
PD2⁽³⁾
PD1
X
le _{1. X = Not guaranteed value, can be read either '1' or '0.'}
so ^{2. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’}
b _{3. Not available on 52-pin UPSD33xx devices}
) ^{- O Table 136. MCU I/O Mode Port A Data Out register (address =csiop+offset 04h)(1)(2)(3)}
t(s ^{Bit 7}
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
c _PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
du _{1. Port A not available on 52-pin UPSD33xx devices}
ro _{2. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’}
P _{3. Default state of register is 00h after reset or power-up}
lete_{Table 137. MCU I/O Mode Port B Data Out register (address = csiop + offset 05h)}⁽¹⁾⁽²⁾
so Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Ob ^PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
1. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2. Default state of register is 00h after reset or power-up
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Doc ID 9685 Rev 7