UPSD3354DV-40U6 Datasheet, PDF (53/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

UPSD33xx
UPSD33xx instruction set summary
Table 8.
Data transfer instruction set (continued)
Mnemonic⁽¹⁾
and use
Description
Length/cycles
MOV
MOV
MOV
MOVC
MOVC
@Ri, direct
@Ri, #data
DPTR, #data16
A, @A+DPTR
A, @A+PC
Move direct byte to indirect
SRAM
Move immediate data to
indirect SRAM
Load Data Pointer with 16-bit
constant
Move code byte relative to
DPTR to ACC
Move code byte relative to PC
to ACC
2 byte/2 cycle
2 byte/1 cycle
3 byte/2 cycle
1 byte/2 cycle
1 byte/2 cycle
MOVX
A, @Ri
Move XDATA (8-bit addr) to
ACC
t(s) ^MOVX
A, @DPTR
Move XDATA (16-bit addr) to
ACC
uc ^MOVX
@Ri, A
Move ACC to XDATA (8-bit
addr)
rod ^MOVX
@DPTR, A
Move ACC to XDATA (16-bit
addr)
P _PUSH
direct
Push direct byte onto stack
te _POP
direct
Pop direct byte from stack
ole XCH
A, Rn
Exchange register with ACC
bs _XCH
A, direct
Exchange direct byte with
ACC
) ^{- O XCH}
A, @Ri
Exchange indirect SRAM with
ACC
ct(s ^XCHD
A, @Ri
Exchange low-order digit
indirect SRAM with ACC
du 1. All mnemonics copyrighted ©Intel Corporation 1980.
Pro _{Table 9.}
solete_CLR
Ob ^CLR
Boolean variable manipulation instruction set
Mnemonic⁽¹⁾
and use
Description
C
Clear carry
bit
Clear direct bit
1 byte/2 cycle
1 byte/2 cycle
1 byte/2 cycle
1 byte/2 cycle
2 byte/2 cycle
2 byte/2 cycle
1 byte/1 cycle
2 byte/1 cycle
1 byte/1 cycle
1 byte/1 cycle
Length/cycles
1 byte/1 cycle
2 byte/1 cycle
SETB
C
Set carry
1 byte/1 cycle
SETB
bit
Set direct bit
2 byte/1 cycle
CPL
C
CPL
bit
Compliment carry
Compliment direct bit
1 byte/1 cycle
2 byte/1 cycle
Doc ID 9685 Rev 7
53/272