UPSD3354DV-40U6 Datasheet, PDF (18/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic

Description
1
Description
UPSD33xx
The Turbo UPSD33xx series combines a powerful 8051-based microcontroller with a flexible
memory structure, programmable logic, and a rich peripheral mix to form an ideal
embedded controller. At its core is a fast 4-cycle 8032 MCU with a 6-byte instruction
prefetch queue (PFQ) and a 4-entry fully associative branching cache (BC) to maximize
MCU performance, enabling loops of code in smaller localities to execute extremely fast.
Code development is easily managed without a hardware in-circuit emulator by using the
serial JTAG debug interface. JTAG is also used for in-system programming (ISP) in as little
as 10 seconds, perfect for manufacturing and lab development. The 8032 core is coupled to
programmable system device (PSD) architecture to optimize the 8032 memory structure,
offering two independent banks of Flash memory that can be placed at virtually any address
within 8032 program or data address space, and easily paged beyond 64 Kbytes using on-
chip programmable decode logic. Dual Flash memory banks provide a robust solution for
remote product updates in the field through in-application programming (IAP). Dual Flash
banks also support EEPROM emulation, eliminating the need for external EEPROM chips.
General purpose programmable logic (PLD) is included to build an endless variety of glue-
) _{logic, saving external logic devices. The PLD is configured using the software development}
t(s ^{tool, PSDsoft™ Express, available from the web at www.st.com, at no charge. The}
c _{UPSD33xx also includes supervisor functions such as a programmable watchdog timer and}
Obsolete ^{Product(s) - Obsolete Produ low-voltage reset.}
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Doc ID 9685 Rev 7