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UPSD3354DV-40U6 Datasheet, PDF (229/272 Pages) STMicroelectronics – fast 8032 MCU with programmable logic
UPSD33xx
PSD module
Figure 77. Automatic Power-down (APD) unit
8032 ADDR FROM MCU MODULE
8032 DATA FROM MCU MODULE
PMMR3, BIT 1 (FORCE_PD)
PMMR0, BIT 1 (APD EN)
8032 ALE
1 = FOUND
ENABLE TRANSITION
TRANSITION
DETECTION
PSD MODULE RST_
CSI (pin PD2)
1 = FOUND
EDGE
EDGE
DETECTION
ENABLE
FULL
CLEAR COUNT
4-BIT APD
UP-COUNTER
CLK
8032 ADDR
8032 DATA
PSD
MODULE
LINE
PDN
BUFFERS
ENABLE
1 = POWER
DOWN MODE
FSx
PDN
CSI
DPLD CHIP
SELECT
EQUATIONS
CSBOOTx
RS0
CSIOP
CLKIN (pin PD1)
WHEN CSI FUNCTION IS SPECIFIED IN PSDSOFT EXPRESS,
) CSI IS PART OF EQUATIONS FOR FSx, CSBOOTx, RS0, and CSIOP
PDN
uct(s Figure 78. Power-down mode flowchart
rod RESET
GPLD
OMC OUTPUTS
AI06608B
lete P Enable APD.
Set PMMR0,
so Bit 1 = 1
Ob OPTIONAL. Disable desired inputs to
) - PLDs by setting PMMR0 bits 4 and 5,
t(sand PMMR2 bits 2 through 6
roduc NO
ALE idle
for 15 CLKIN
P clocks?
te YES
ole PDN = 1, PSD
s Module in Power-
Ob Down Mode
AI09183
Doc ID 9685 Rev 7
229/272