Z86E3016PSG Datasheet, PDF (96/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
78
Read/Write Operations
Port 2 is accessed as General-Purpose Register P2 (02h). Port 2 is written
by specifying P2 as an instruction’s destination register. Writing to Port 2
causes data to be stored in the output register of Port 2, and reflected
externally on any bit configured as an output.
Port 2 is read by specifying P2 as the source register of an instruction.
When an output bit is read, data on the external
pin is returned. Under normal loading conditions, this is equivalent to
reading the output register. However, if a bit of Port 2 is defined as an
open-drain output, the data returned is the value forced on the output pin
by the external system. This may not be the same as the data in the output
register. Reading input bits of Port 2 also returns data on the external pins.
However, inputs under handshake control return data latched into the
input register via the input strobe.
Handshake Operation
Port 2 can be placed under handshake control by programming bit 6 in the
Port 3 Mode Register (see Figure 42). In this configuration, Port 3 lines
P31 and P36 are used as the handshake control lines DAV2 and RDY2 for
input handshake, or RDY2 and DAV2 for output handshake.
Handshake direction is determined by the configuration (input or output)
assigned to bit 7 of Port 2. Only those bits with the same configuration as
P27 will be under handshake control. Figure 43 illustrates the bit lines of
Port 2 and the associated handshake lines of Port 3.
I/O Ports
UM001602-0904