Z86E3016PSG Datasheet, PDF (215/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
197
Clock
A15-A8
AD7–AD0
AS
DS
R/W
DM
Machine Cycle
T1
T2
TX
T3
A7–A0
A15–A8
D7–D0 OUT
Write Cycle
Figure 129. Extended External Memory Write Cycle
Timing is extended by setting bit D5 in the Port 0–1 Mode Register (F8h)
to 1 (see Figure 130). After a RESET, this bit is set to 0.
UM001602-0904
External Interface