Z86E3016PSG Datasheet, PDF (57/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
39
• Signal lines should not run parallel to the clock oscillator inputs. In
particular, the crystal input circuitry and the internal system clock
output should be separated as much as possible.
• V_CC power lines should be separated from the clock oscillator input
circuitry.
• Resistivity between XTAL1 or XTAL2 and the other pins should be
greater than 10 MΩ.
UM001602-0904
Clock