Z86E3016PSG Datasheet, PDF (39/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
21
Table 7. Z8 Expanded Register File Bank Layout
Expanded Register
File Bank
ERF
4h
Not implemented (reserved)
3h
Not implemented (reserved)
2h
Not implemented (reserved)
1h
Not implemented (reserved)
0h
Z8 Ports 0, 1, 2, 3, and General-Purpose
Registers 04h to EFh, and control
registers F0h to FFh.
Please refer to the specific product specification to determine the above
registers are implemented.
Z8 Control and Peripheral Registers
Standard Z8 Registers
The standard Z8 control registers govern the operation of the CPU. Any
instruction which references the register file can access these control reg-
isters. Available control registers are:
• Interrupt Priority Register (IPR)
• Interrupt Mask Register (IMR)
• Interrupt Request Register (IRQ)
• Program Control Flags (FLAGS)
• Register Pointer (RP)
• Stack Pointer High-Byte (SPH)
• Stack Pointer Low-Byte (SPL)
UM001602-0904
Address Space