Z86E3016PSG Datasheet, PDF (183/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
165
Serial Input/Output
UART Introduction
Select Z8 CPU^® microcontrollers contain an on-board full-duplex Uni-
versal Asynchronous Receiver/Transmitter (UART) for data communica-
tions. The UART consists of a Serial I/O Register (SIO) located at address
F0h, and its associated control logic (see Figure 105). The SIO is actually
two registers, the receiver buffer and the transmitter buffer, which are
used in conjunction with Counter/Timer T0 and Port 3 I/O lines P30
(input) and P37 (output). Counter/Timer T0 provides the clock input for
control of the data rates.
Read FOH
Internal Data Bus
Receiver
Buffer
Transfer
Write FOH
Stop
Bit Detect
Mark
P3₀
Serial
In
Start
Bit Detect
Receiver
Shift Register
Char
Detect
Parity
Check
Shift
Clock
Transmitter
Shift Register
RESET
Shift
Clock
÷16
Start
Clock
Control
÷6
Stop
Serial I/O Clock (From T0)
Figure 105. UART Block Diagram
IRQ₄
Serial
Out
P3₇
Parity
Gan
IRQ₃
UM001602-0904
Serial Input/Output