Z86E3016PSG Datasheet, PDF (247/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
229
Flag
C
Z
S
V
D
H
Description
Set if there is a carry from the most significant bit of the result;
cleared otherwise.
Set if the result is zero; cleared otherwise.
Set if the result is negative; cleared otherwise.
Set if an arithmetic overflow occurs, that is, if both operands are
of the same sign and the result is of the opposite sign; cleared
otherwise.
Always cleared.
Set if there is a carry from the most significant bit of the low
order four bits of the result; cleared otherwise.
Note: Address modes R or IR can be used to specify a 4-bit Working Register. In
this format, the source or destination Working Register operand is speci-
fied by adding 1110b (Eh) to the high nibble of the operand. For example,
if Working Register R12 (CH) is the destination operand, then ECh will be
used as the destination operand in the Op Code.
E
src
or
E
dst
Example
If Working Register R3 contains 16h, the C Flag is set to 1, and Working
Register R11 contains 20h, the statement:
ADC R3, R11
Op Code: 12 3B
leaves the value 37h in Working Register R3. The C, Z, S, V, D, and H
Flags are all cleared.
Example
If Working Register R16 contains 16h, the C Flag is not set, Working
Register R10 contains 20h, and Register 20h contains 11h, the statement:
ADC R16, @R10
Op Code: 13 FA
UM001602-0904
Instruction Description