Z86E3016PSG Datasheet, PDF (105/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
87
Port 3 Output Configuration
OUT
PIN
TTL Level Shifter
Port 3 Input Configuration
IN
PIN
Autolatch
R ≈ 500 KΩ
Figure 48. Port 3 Configuration with TTL Level Shifter and
Autolatch
Read/Write Operations
Port 3 is accessed as a General-Purpose Register P3 (03h). Port 3 is writ-
ten by specifying P3 as an instruction’s destination register. However,
Port 3 outputs cannot be written to if they are used for special functions.
When writing to Port 3, data is stored in the output register.
Port 3 is read by specifying P3 as the source register of an instruction.
When reading from Port 3, the data returned is both the data on the input
pins and in the output register.
UM001602-0904
I/O Ports