Z86E3016PSG Datasheet, PDF (335/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
317
Swap Nibbles
SWAP dst
Instruction Format
OPC
dst
Cycles
6
6
OPC
(Hex)
F0
F1
Address Mode
dst
R
IR
Operation
dst(7-4) ↔ dst(3-0)
The contents of the lower four bits and upper four bits of the destination
operand are swapped.
Flag
C
Z
S
V
D
H
Description
Unaffected
Set if the result is zero; cleared otherwise.
Set if the result bit 7 is set; cleared otherwise.
Undefined
Unaffected
Unaffected
Note: Address modes R or IR can be used to specify a 4-bit Working Register. In
this format, destination Working Register operand is specified by adding
1110b (Eh) to the high nibble of the operand. For example, if Working
Register R12 (CH) is the destination operand, then ECh will be used as the
destination operand in the Op Code.
E
dst
Example
If Register BCh contains B3h (10110011B), the statement:
UM001602-0904
Instruction Description