Z86E3016PSG Datasheet, PDF (76/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
58
Clock Source for WDT. The D4 bit determines which oscillator source
is used to clock the internal POR and WDT counter chain. If the bit is a 1,
the internal RC oscillator is bypassed and the POR and WDT clock source
is driven from the external pin, XTAL1. The default configuration of this
bit is 0, which selects the internal RC oscillator.
Bits 5, 6, and 7. These bits are reserved.
V_CC Voltage Comparator. An on-board voltage comparator checks that
V_CC is at the required level to insure correct operation of the device. Reset
is globally driven if V_CC is below the specified voltage. This feature is
available in select ROM Z8 devices. See the device product specification
for feature availability and operating range.
Power-On-Reset
A timer circuit clocked by a dedicated on-board RC oscillator is used for
the Power-On Reset (POR) timer function, T_POR. This POR time allows
V_CC and the oscillator circuit to stabilize before instruction execution
begins.
The POR timer circuit is a one-shot timer triggered by one of three condi-
tions:
• Power fail to Power OK status (cold start)
• Stop-Mode Recovery (if bit 5 of SMR = 1)
• WDT time-out
The POR time is specified as T_POR. On Z8 devices that feature a Stop-
Mode Recovery register (SMR), bit 5 selects whether the POR timer is
used after Stop-Mode Recovery or by-passed. If bit D5 = 1 then the POR
timer is used. If bit 5 = 0 then the POR timer is by-passed. In this case, the
Stop-Mode Recovery source must be held in the recovery state for 5 T_PC
or 5 crystal clocks to pass the reset signal internally. This option is used
Watch–Dog Timer
UM001602-0904