Z86E3016PSG Datasheet, PDF (329/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
311
Address modes R or IR can be used to specify a 4-bit Working Register. In
Note: _{this format, the source or destination Working Register operand is speci-}
fied by adding 1110b (Eh) to the high nibble of the operand. For example,
if Working Register R12 (CH) is the destination operand, then ECh will be
used as the destination operand in the Op Code.
E
src
or
E
dst
Example
]If Working Register R3 contains 16h, and Working Register R11 con-
tains 20h, the statement:
SUB R3, R11
Op Code: 22 3B
leaves the value F6h in Working Register R3. The C, S, and D Flags are
set, and the Z, V, and H flags are cleared.
Example
If Working Register R15 contains 16h, Working Register R10 contains
20h, and Register 20h contains 11h, the statement:
SUB R16, @R10
Op Code: 23 FA
leaves the value 05h in Working Register R15. The D Flag is set, and the
C, Z, S, V, and H flags are cleared.
Example
If Register 34h contains 2Eh, and Register 12h contains 1Bh, the state-
ment:
SUB 34h, 12h
Op Code: 24 12 34
leaves the value 13h in Register 34h. The D Flag is set, and the C, Z, S, V,
and H flags are cleared.
UM001602-0904
Instruction Description