Z86E3016PSG Datasheet, PDF (328/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
310
Subtract
SUB dst, src
Instruction Format
OPC
OPC
OPC
dst src
src
dst
Cycles
6
6
OPC
(Hex)
22
23
Address
Mode
dst src
r
r
r
lr
dst
10
24
R
R
10
25
R
IR
src
10
26
R
IM
10
27 IR IM
Operation
dst ← dst–src
The source operand is subtracted from the destination operand and the
result is stored in the destination operand. The contents of the source
operand are not affected. Subtraction is performed by adding the two’s
complement of the source operand to the destination operand.
Flag
C
Z
V
S
H
D
Description
Cleared if there is a carry from the most significant bit of the
result; set otherwise, indicating a borrow.
Set if the result is 0; cleared otherwise.
Set if arithmetic overflow occurred (if the operands were of
opposite sign and the sign of the result is the same as the sign of
the source); reset otherwise.
Set if the result is negative; cleared otherwise.
Cleared if there is a carry from the most significant bit of the low
order four bits of the result; set otherwise indicating a borrow.
Always set to 1.
Instruction Description
UM001602-0904