Z86E3016PSG Datasheet, PDF (80/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
62
Register
Port 0–1 Mode
Port 3 Mode
Port 2 Mode
HEX
F8h
F7h
F6h
Identifier
P01M
P3M
P2M
Port 3
Port 2
Port 1
Port 0
03h
P3
02h
P2
01h
P1
00h
P0
Figure 28. I/O Ports and Mode Registers
Because of their close association, Port and Mode registers are treated
like any other general-purpose register. There are no special instructions
for port manipulation. Any instruction which addresses a register can
address the ports. Data can be directly accessed in the Port Register, with
no extra moves.
Input and Output Registers
Each bit of Ports 0, 1, and 2, have an input register, an output register,
associated buffer, and control logic. Because there are separate input and
output registers associated with each port, writing to bits defined as inputs
stores the data in the output register. This data cannot be read as long as
the bits are defined as inputs. However, if the bits are reconfigured as out-
puts, the data stored in the output register is reflected on the output pins
I/O Ports
UM001602-0904