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Z86E3016PSG Datasheet, PDF (289/348 Pages) Zilog, Inc. – Z86E3016PSG
Z8 CPU
User Manual
271
Load Constant Autoincrement
LDCI dst, src
Instruction Format
OPC
OPC
dst src
dst src
Cycles
18
OPC
(Hex)
C3
18
D3
Address Mode
dst
src
Ir
Irr
Irr
Ir
Operation
dst ← src
r←r+1
rr ← rr + 1
This instruction is used for block transfers of data between program mem-
ory and the Register File. The address of the program memory location is
specified by a Working Register Pair, and the address of the Register File
location is specified by Working Register. The contents of the source loca-
tion are loaded into the destination location. Both addresses in the Work-
ing Registers are then incremented automatically. The contents of the
source operand are not affected.
Flag
C
Z
S
V
D
H
Description
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
UM001602-0904
Instruction Description