Z86E3016PSG Datasheet, PDF (34/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
16
Currently, three out of the possible sixteen Z8 ERF Banks have been
implemented. ERF Bank 0, also known as the Z8^® Standard Register File,
has all 256 bytes defined, as shown in Figure 7. Only Working Register
Group 0 (register addresses 00h to 0Fh) have been defined for ERF Bank
C and ERF Bank F (see Table 4). All other working register groups in
ERF Banks C and F, as well as the remaining thirteen ERF Banks, are not
implemented. All are reserved for future use.
When an ERF Bank is selected, register addresses 00h to 0Fh access
those sixteen ERF Bank registers—in effect replacing the first sixteen
locations of the Z8^® Standard Register File.
For example, if ERF Bank C is selected, the Z8^® Standard Registers 00h
through 0Fh are no longer accessible. Registers 00h through 0Fh are now
the 16 registers from ERF Bank C, Working Register Group 0. No other
Z8 Standard Registers are affected because only Working Register Group
0 is implemented in ERF Bank C.
Access to the ERF is accomplished through the Register Pointer (FDh).
The lower nibble of the Register Pointer determines the ERF Bank while
the upper nibble determines the Working Register Group within the regis-
ter file, as Figure 7 shows.
0111
1100
Working
Register
Group
Expanded
Register
Bank
Select ERF Bank Ch
Working Register Group 7h
Figure 7. Register Pointer Example
Address Space
UM001602-0904