Z86E3016PSG Datasheet, PDF (269/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
251
Disable Interrupts
Dl
Instruction Format
OPC
Cycles
6
OPC
(Hex)
8F
Operation
IMR (7) ← 0
Bit 7 of Control Register FBh (the Interrupt Mask Register) is reset to 0.
All interrupts are disabled, although they remain potentially enabled. (For
instance, the Global Interrupt Enable is cleared, but not the individual
interrupt level enables.)
Flag
C
Z
S
V
D
H
Description
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Example
If Control Register FBh contains 8Ah (10001010) (interrupts IRQ1 and
IRQ3 are enabled), the statement:
DI
Op Code: 8F
sets Control Register FBh to 0Ah (00001010b) and disables these inter-
rupts.
UM001602-0904
Instruction Description