Z86E3016PSG Datasheet, PDF (255/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
237
Complement
COM dst
Instruction Format
OPC
dst
Cycles
6
6
OPC
(Hex)
60
61
Address Mode
dst
R
IR
Operation
dst ← NOT dst
The contents of the destination operand are complemented (one’s comple-
ment). All 1 bits are changed to 0, and all 0 bits are changed to 1.
Flag
C
Z
S
V
D
H
Description
Unaffected
Set if the result is zero; cleared otherwise.
Set if result bit 7 is set; cleared otherwise.
Always reset to 0.
Unaffected
Unaffected
Note: Address modes R or IR can be used to specify a 4-bit Working Register. In
this format, the destination Working Register operand is specified by add-
ing 1110b (Eh) to the high nibble of the operand. For example, if Working
Register R12 (CH) is the destination operand, then ECh will be used as the
destination operand in the Op Code.
E
dst
Example
If Register 08h contains 24h (00100100b), the statement:
UM001602-0904
Instruction Description