Z86E3016PSG Datasheet, PDF (262/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
244
If the result of the addition is stored in Register 5Fh, the statement:
DA 5Fh
Op Code: 40 5F
adjusts this result so the correct BCD representation is obtained.
0011 1100 = 3Ch
0000 0110 = 06h
0100 0010 = 42h
Register 5Fh now contains the value 42h. The C, Z, and S flags are
cleared, and V is undefined.
Example
If addition is performed using the BCD value 15 and 27, the result should
be 42. The sum is incorrect, however, when the binary representations are
added in the destination location using standard binary arithmetic.
0001 0101 = 15h
+ 0010 0111 = 27h
0011 1100 = 3Ch
Register 45F contains the value 5Fh, and the result of the addition is
stored in Register 5Fh, the statement:
DA @45h
Op Code: 40 45
adjusts this result so the correct BCD representation is obtained.
0011 1100 = 3Ch
0000 0110 = 06h
0100 0010 = 42h
Register 5Fh now contains the value 42h. The C, Z, and S flags are
cleared, and V is undefined.
Instruction Description
UM001602-0904