Z86E3016PSG Datasheet, PDF (236/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
218
Table 39. Summary of Z8 Instruction Set
Instruction and
Operation
dst ← src
LDEI dst, src
dst ← src and
r ← r + 1 or
rr ←rr + 1
NOP
OR dst, src
dst ← dst OR src
POP dst
dst ← @SP
and SP ← SP + 1
PUSH src
SP ← SP–1
and @SP ← src
RCF
C←0
RET
PC ← @SP;
SP ← SP + 2
RL dst
C
7
0
Address
Mode
dst src
Op Code
Byte
(Hex)
Flags Affected
C Z S VDH
lrr r
92
Ir Irr
83 – – – – – –
lrr Ir
93
FF – – – – – –
†
4[ ] – [ [ 0 – –
R
50 – – – – – –
IR
51
R
70 – – – – – –
IR
71
CF 0 – – – – –
AF – – – – – –
R
90
[ [ [ [ ––
IR
91
*Note: These instructions have an identical set of addressing modes, which are encoded for brevity. The
first opcode nibble is found in the instruction set table above. The second nibble is expressed symbolically
by a ‘[ ]’ in this table, and its value is found in the following table to the left of the applicable addressing
mode pair. For example, the opcode of an ADC instruction using the addressing modes r (destination)
and Ir (source) is 13.
Instruction Set
UM001602-0904