Z86E3016PSG Datasheet, PDF (89/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
71
8
Z8
Port 1
(I/O or AD7–AD0)
Handshake Controls
DAV1 and RDY1
(P33 and P34)
OEN
PIN
OUT
IN
TTL Level Shifter
Figure 35. Port 1 Configuration with TTL Level Shifter
Read/Write Operations
In byte input or byte output mode, the port is accessed as General-Purpose
Register P1 (01h). The port is written by specifying P1 as an instruction's
UM001602-0904
I/O Ports