Z86E3016PSG Datasheet, PDF (123/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
105
Halt Mode
The analog comparators are functional during HALT mode if analog
mode has been enabled. P31 and P32, in conjunction with P33 (Ref) will
be able to generate interrupts. Only P33 cannot generate an interrupt
Because the P33 input goes directly to the Ref input of the comparators
and is disconnected from the interrupt sensing circuits.
Stop Mode
The analog comparators are disabled during STOP mode so it does not
use any current at that time. If P31, P32, or P33 are used as a source for
Stop-Mode Recovery, the Port 3 digital mode must be selected by setting
bit D1 = 0 in the Port 3 Mode Register. Otherwise in STOP mode, the
P31, P32, and P33 cannot be sensed. If analog mode was selected when
entering STOP mode, it will still be enabled after a valid SMR triggered
reset.
Open-Drain Configuration
All Z8^® MCUs can configure Port 2 to provide open-drain outputs by pro-
gramming the Port 3 Mode Register (P3M) bit D0 = 0.
Register F7h
Port 3 Mode Register
(Write-Only)
D7 D6 D5 D4 D3 D2 D1 D0
Port 2 Configuration
1 = Pull-Ups Open-Drain
0 = Pull-Ups Active
Figure 61. Port 2 Configuration
Other Z8^® MCUs feature a Port Configuration Register (PCON) for
which Port 0 and Port 1 can be configured to provide open-drain outputs.
UM001602-0904
I/O Ports