Z86E3016PSG Datasheet, PDF (257/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
239
Compare
CP dst, src
Instruction Format
OPC
OPC
OPC
dst src
src
dst
Cycles
6
6
OPC
(Hex)
A2
A3
Address
Mode
dst src
r
r
r
lr
dst
10
A4
R
R
10
A5
R
IR
src
10
A6
R
IM
10
A7 IR IM
Operation
dst–src
The source operand is compared to (subtracted from) the destination
operand, and the appropriate flags are set accordingly. The contents of
both operands are unaffected.
Flag
C
Z
S
V
D
H
Description
Cleared if there is a carry from the most significant bit of the
result. Set otherwise indicating a borrow.
Set if the result is zero; cleared otherwise.
Set if result bit 7 is set (negative); cleared otherwise.
Set if arithmetic overflow occurs; cleared otherwise.
Unaffected
Unaffected
Note: Address modes R or IR can be used to specify a 4-bit Working Register. In
this format, the source or destination Working Register operand is speci-
fied by adding 1110b (Eh) to the high nibble of the operand. For example,
UM001602-0904
Instruction Description