Z86E3016PSG Datasheet, PDF (61/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
43
In Figures 18 through 20, ZiLOG recommends that the user connect the
load capacitor ground trace directly to the V_SS (GND) pin of the Z8^®
CPU to ensure that no system noise is injected into the Z8^® clock. This
trace should not be shared with any other components except at the V_SS
pin of the Z8^® CPU.
In some cases, the Z8^® CPU’s XTAL1 pin also functions as one of the
EPROM high-voltage mode programming pins or as a special factory test
pin. In this case, applying 2 V above V_CC on the XTAL1 pin will cause
the device to enter one of these modes. Because this pin accepts high volt-
ages to enter these respective modes, the standard input protection diode
to V_CC is not on XTAL1. ZiLOG recommends that in applications where
the Z8^® CPU is exposed to much system noise, a diode from XTAL1 to
V_CC be used to prevent accidental enabling of these modes. This diode
will not affect the crystal/ceramic resonator operation.
Please note that a parallel resonant crystal or resonator data sheet will
specify a load capacitor value that is the series combination of C₁ and C₂,
including all parasitics (PCB and holder).
LC Oscillator
The Z8^® CPU oscillator can use a LC network to generate a XTAL clock
(see Figure 19).
The frequency stays stable over V_CC and temperature. The oscillation fre-
quency is determined by the equation.
Frequency =
1
2 π (LC_T)^1/2
where L is the total inductance including parasitics and C_T is the total
series capacitance including the parasitics.
Simple series capacitance is calculated using the following equation:
UM001602-0904
Clock