Z86E3016PSG Datasheet, PDF (332/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
314
Flag
C
Z
V
S
H
D
Description
Cleared if there is a carry from the most significant bit of the
result; set otherwise, indicating a borrow.
Set if the result is 0; cleared otherwise.
Set if arithmetic overflow occurred (if the operands were of
opposite sign and the sign of the result is the same as the sign of
the source); reset otherwise.
Set if the result is negative; cleared otherwise.
Cleared if there is a carry from the most significant bit of the low
order four bits of the result; set otherwise indicating a borrow.
Always set to 1.
Note: Address modes R or IR can be used to specify a 4-bit Working Register. In
this format, the source or destination Working Register operand is speci-
fied by adding 1110b (Eh) to the high nibble of the operand. For example,
if Working Register R12 (CH) is the destination operand, then ECh will be
used as the destination operand in the Op Code.
E
src
or
E
dst
Example
Working Register R3 contains 16h, the C Flag is set to 1, and Working
Register R11 contains 20h, the statement:
SBC R3, R11
Op Code: 32 3B
leaves the value F5h in Working Register R3. The C, S, and D Flags are
set, and the Z, V, and H Flags are all cleared.
Example
If Working Register R15 contains 16h, the C Flag is not set, Working
Register R10 contains 20h, and Register 20h contains 11h, the statement:
SBC R16, @R10
Op Code: 33 FA
Instruction Description
UM001602-0904