Z86E3016PSG Datasheet, PDF (243/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
225
Add
ADD dst, src
Instruction Format
OPC
OPC
OPC
dst src
src
dst
Cycles
6
6
OPC
(Hex)
02
03
Address
Mode
dst src
r
r
r
lr
dst
10
04
R
R
10
05
R
IR
src
10
06
R
IM
10
07 IR IM
Operation
dst ← dst + src
The source operand is added to the destination operand. Two’s comple-
ment addition is performed. The sum is stored in the destination operand.
The contents of the source operand are not affected.
Flags
C
Z
S
V
D
H
Description
Set if there is a carry from the most significant bit of the result;
cleared otherwise.
Set if the result is zero; cleared otherwise.
Set if the result is negative; cleared otherwise.
Set if an arithmetic overflow occurs, that is, if both operands are
of the same sign and the result is of the opposite sign; cleared
otherwise.
Always cleared.
Set if there is a carry from the most significant bit of the low
order four bits of the result; cleared otherwise.
UM001602-0904
Instruction Description