Z86E3016PSG Datasheet, PDF (223/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 CPU
User Manual
205
Processor Flags
The Flag Register (FCh) informs the user of the current status of the Z8^®
CPU. The flags and their bit positions in the Flag Register are shown in
Figure 133.
The Z8^® Flag Register contains six bits of status information which are
set or cleared by CPU operations. Four of the bits (C, V, Z and S) can be
tested for use with conditional Jump instructions. Two flags (H and D)
cannot be tested and are used for BCD arithmetic. The two remaining bits
in the Flag Register (F1 and F2) are available to the user, but they must be
set or cleared by instructions and are not usable with conditional Jumps.
As with bits in the other control registers, the Flag Register bits can be set
or reset by instructions; however, only those instructions that do not affect
the flags as an outcome of the execution should be used (Load Immedi-
ate).
Note: The Watch–Dog Timer (WDT) instruction affects the Flags accordingly: Z
= 1, S = 0, V = 0.
Register FCh (Flags)
Flag Register (Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
User Flag (F1)
User Flag (F2)
Half Carry Flag (H)
Decimal Adjust Flag (D)
Overflow Flag (V)
Sign Flag (S)
Zero Flag (Z)
Carry Flag (C)
Figure 133. Z8 Flag Register
UM001602-0904
Instruction Set