Z86E3016PSG Datasheet, PDF (70/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
52
Table 15. Sample Expanded Register File Bank F Reset Values
Register
(Hex) Register Name
Bits
7 6 5 4 3 2 1 0 Comments
00
Port Configuration 1 1 1 1 1 1 1 0 Comparator outputs
(PCON)
disabled on Port 3.
Port 0 and 1 output is
push–pull.
Port 0, 1, 2, 3, and
oscillator with standard
output drive.
0B
Stop-Mode
0 0 1 0 0 0 0 0 Clock divide by 16 off.
Recovery (SMR)
XTAL divide by 2.
POR and/OR External
Reset.
Stop delay on.
Stop recovery level is low,
STOP flag is POR.
0F
Watch–Dog Timer U U U 0 1 1 0 1 512 TPC for WDT time
Mode (WDTMR)
out, WDT runs during
STOP.
Reset
UM001602-0904