Z86E3016PSG Datasheet, PDF (168/348 Pages) Zilog, Inc. – Z86E3016PSG

Z8 Family of Microcontrollers
User Manual
150
IRQ Software Interrupt Generation
IRQ can be used to generate software interrupts by specifying IRQ as the
destination of any instruction referencing the Z8^® Standard Register File.
These Software Interrupts (SWI) are controlled in the same manner as
hardware generated requests (in other words, the IPR and the IMR control
the priority and enabling of each SWI level).
To generate a SWI, the appropriate request bit in the IRQ is set as follows:
ORIRQ, #NUMBER
where the immediate data, NUMBER, has a 1 in the bit position corre-
sponding to the appropriate level of the SWI. For example, if an SWI is
required on IRQ5, NUMBER would have a 1 in bit 5:
OR IRQ, #00100000b
With this instruction, if the interrupt system is globally enabled, IRQ5 is
enabled, and there are no higher priority pending requests, control is
transferred to the service routine pointed to by the IRQ5 vector.
Vectored Processing
Each Z8 interrupt level has its own vector. When an interrupt occurs, con-
trol passes to the service routine pointed to by the interrupt’s vector loca-
tion in program memory. The sequence of events for vectored interrupts is
as follows:
• PUSH PC Low byte on stack
• PUSH PC High byte on stack
• PUSH FLAGS on stack
• Fetch High byte of vector
• Fetch Low byte of vector
Interrupts
UM001602-0904