SAA7108AE Datasheet, PDF (86/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
• Audio master Clocks Nominal Increment, ACNI[21:0] 36h[5:0] 35h[7:0] 34h[7:0]
according
to
the equation:
ACNI [21:0]
=
roun
d


c^--a--r^--uy---ds---ti^--ao^---l^---f--fr^--r^-e--e^-q--q^--u-u^--e--e^-n--n^-c--c^-y--y^-
×
2²³_
See Table 35 for examples.
Remark: For standard applications the synthesized audio clock AMCLK can be used
directly as master clock and as input clock for port AMXCLK (short cut) to generate
ASCLK and ALRCLK. For high-end applications it is recommended to use an external
analog PLL circuit to enhance the performance of the generated audio clock.
Table 35. Programming examples for audio master clock generation
Crystal
Field (Hz) ACPF
frequency
(MHz)
Decimal
Hex
ACNI
Decimal
AMCLK = 256 × 48 kHz (12.288 MHz)
32.11
50
245 760
3 C000
3 210 190
59.94
205 005
3 20CD
3 210 190
24.576
50
-
-
-
59.94
-
-
-
AMCLK = 256 × 44.1 kHz (11.2896 MHz)
32.11
50
225 792
3 7200
2 949 362
59.94
188 348
2 DFBC
2 949 362
24.576
50
225 792
3 7200
3 853 517
59.94
188 348
2 DFBC
3853 517
AMCLK = 256 × 32 kHz (8.192 MHz)
32.11
50
163 840
2 8000
2 140127
59.94
136 670
2 15DE
2 140 127
24.576
50
163 840
2 8000
2 796 203
59.94
136 670
2 15DE
2 796 203
Hex
30 FBCE
30 FBCE
-
-
2D 00F2
2D 00F2
3A CCCD
3A CCCD
20 A7DF
20 A7DF
2A AAAB
2A AAAB
9.6.2 Signals ASCLK and ALRCLK
Two binary divided signals ASCLK and ALRCLK are provided for slower serial digital
audio signal transmission and for channel-select. The frequencies of these signals are
defined by the following parameters:
• SDIV[5:0] 38h[5:0] according to the equation: f _ASCLK = ₍---_S---_D---^f--_I-^A-_V--^M----^X₊---^C--₁-^L--₎-^K---_×-----₂- ⇒
SDIV [5:0] = -_2f---^A-_f---^MA----_SX--_C-^C--_L-^L--_K-^K-- – 1
• LRDIV[5:0] 39h[5:0] according to the equation: f _ALRCLK = -_L---_R--^f--_D-^A---^S-_I--^C_V---^L---^K_×-----₂- ⇒
LRDIV [5:0] = ₂-----^ff---^AA---^SL--^C-_R---^LC---^KL---_K--
See Table 36 for examples.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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