SAA7108AE Datasheet, PDF (166/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 208. I port output format and configuration; register set A [93h[7:5]] and
B [C3h[7:5]]^[1]
I port output format and configuration
Control bits 7 to 5
ICODE I8_16 FYSK
All lines will be output
X
X
0
Skip the number of leading Y only lines, as defined by FOI1 and FOI0 X
X
1
Double words are transferred byte wise, see subaddress 85h bits
X
0
X
ISWP1 and ISWP0
Double words are transferred 16-bit word wise via IPD and HPD, see X
1
X
subaddress 85h bits ISWP1 and ISWP0
No ITU 656 like SAV/EAV codes are available
0
X
X
ITU 656 like SAV/EAV codes are inserted in the output data stream, 1
X
X
framed by a qualifier
[1] X = don’t care.
Table 209. I port output format and configuration; register set A [93h[4:0]] and
B [C3h[4:0]]^[1]
I port output format and configuration
Control bits 4 to 0
FOI1 FOI0 FSI2 FSI1
4 : 2 : 2 double word formatting
X
X
0
0
4 : 1 : 1 double word formatting
X
X
0
0
4 : 2 : 0, only every 2nd line Y + C_B-C_R output, in X
X
0
1
between Y only output
4 : 1 : 0, only every 4th line Y + C_B-C_R output, in X
X
0
1
between Y only output
Y only
X
X
1
0
Not defined
X
X
1
0
Not defined
X
X
1
1
Not defined
X
X
1
1
No leading Y only line, before 1st Y + C_B-C_R line is 0
0
X
X
output
1 leading Y only line, before 1st Y + C_B-C_R line is 0
1
X
X
output
2 leading Y only lines, before 1st Y + C_B-C_R line is 1
0
X
X
output
3 leading Y only lines, before 1st Y + C_B-C_R line is 1
1
X
X
output
[1] X = don’t care.
FSI0
0
1
0
1
0
1
0
1
X
X
X
X
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
166 of 208