SAA7108AE Datasheet, PDF (177/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
12.4.1 Trigger condition
For trigger condition STRC[1:0] 90h[1:0] not equal ‘00’.
If the value of (YO + YS) is greater than or equal to 262 (NTSC), respectively 312 (PAL)
the output field rate is reduced to 30 Hz, respectively 25 Hz.
Horizontal and vertical offsets (XO and YO) have to be used to adjust the displayed video
in the display window. As this adjustment is application dependent, the listed values are
only dummy values.
12.4.2 Maximum zoom factor
The maximum zoom factor is dependent on the back-end data rate and therefore
back-end clock and data format dependent (8-bit or 16-bit output). The maximum
horizontal zoom is limited to approximately 3.5, due to internal data path restrictions.
12.4.3 Examples
Table 235. Example of configurations
See settings in Table 236.
Example Scaler source and reference events
number
Input
Output Scale ratios
window window
1
analog input to 8-bit I port output, with
720 × 240 720 × 240 prsc = 1;
SAV/EAV codes, 8-bit serial byte stream
fisc = 1; vsc = 1
decoder output at X port; acquisition trigger
at falling edge vertical and rising edge
horizontal reference signal; H and V gates on
IGPH and IGPV, IGP0 = VBI sliced data flag,
IGP1 = FIFO almost full, level ≥ 24, IDQ
qualifier logic 1 active
2
analog input to 16-bit output, without
704 × 288 768 × 288 prsc = 1;
SAV/EAV codes, Y on I port, C_B-C_R on
H port and decoder output at X port;
fisc = 0.91667;
vsc = 1
acquisition trigger at falling edge vertical and
rising edge horizontal reference signal;
H and V pulses on IGPH and IGPV, output
FID on IGP0, IGP1 fixed to logic 1, IDQ
qualifier logic 0 active
3
X port input 8 bit with SAV/EAV codes, no 720 × 240 352 × 288 prsc = 2;
reference signals on XRH and XRV, XCLK as
fisc = 1.022;
gated clock; field detection and acquisition
vsc = 0.8333
trigger on different events; acquisition
triggers at rising edge vertical and rising
edge horizontal reference signal; I port
output 8-bit with SAV/EAV codes like
example number 1
4
X port and H port for 16-bit Y-C_B-C_R 4 : 2 : 2 720 × 288 200 × 80 prsc = 2;
input (if no 16-bit output selected);
fisc = 1.8;
XRH and XRV as references; field detection
vsc = 3.6
and acquisition trigger at falling edge vertical
and rising edge horizontal reference signal;
I port output 8-bit with SAV/EAV codes, but
Y only output
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
177 of 208