SAA7108AE Datasheet, PDF (141/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
11.2.2.4 Subaddress 03h
Table 145. Analog input control 2 (AICO2); 03h[6:0]
Bit Description
Symbol Value Function
6 HL not reference select HLNRS 0
normal clamping if decoder is in unlocked state
1^[1] reference select if decoder is in unlocked state
5 AGC hold during
VBSL 0
vertical blanking period
short vertical blanking (AGC disabled during
equalization and serration pulses)
1
long vertical blanking (AGC disabled from start of
pre-equalization pulses until start of active video
(line 22 for 60 Hz, line 24 for 50 Hz)
4 white peak control off WPOFF 0^[1] white peak control active
1
white peak control off
3 automatic gain control HOLDG 0
integration
1
AGC active
AGC integration hold (freeze)
2 gain control fix
GAFIX 0
automatic gain controlled by MODE3 to MODE0
1
gain is user programmable via GAI[17:10] and
GAI[27:20]
1 static gain control
channel 2 sign bit
GAI28 see Table 147
0 static gain control
channel 1 sign bit
GAI18 see Table 146
[1] HLNRS = 1 should not be used in combination with WPOFF = 0.
11.2.2.5 Subaddress 04h
Table 146. Analog input control 3 (AICO3); static gain control channel 1; 03h[0] and 04h[7:0]
Decimal Gain
value
(dB)
Sign bit Control bits 7 to 0
03h[0]
GAI18 GAI17 GAI16 GAI15 GAI14 GAI13 GAI12 GAI11 GAI10
0...
−3
0
0
0
0
0
0
0
0
0
...144
0
0
1
0
0
1
0
0
0
0
145...
0
0
1
0
0
1
0
0
0
1
...511
+6
1
1
1
1
1
1
1
1
1
11.2.2.6 Subaddress 05h
Table 147. Analog input control 4 (AICO4); static gain control channel 2; 03h[1] and 05h[7:0]
Decimal Gain
value
(dB)
Sign bit Control bits 7 to 0
03h[1]
GAI28 GAI27 GAI26 GAI25 GAI24 GAI23 GAI22 GAI21 GAI20
0...
−3
0
0
0
0
0
0
0
0
0
...144
0
0
1
0
0
1
0
0
0
0
145...
0
0
1
0
0
1
0
0
0
1
...511
+6
1
1
1
1
1
1
1
1
1
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
141 of 208