SAA7108AE Datasheet, PDF (165/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 206. X port input reference signal definitions; register set A [92h[7:4]] and
B [C2h[7:4]]^[1]
X port input reference signal definitions
Control bits 7 to 4
XFDV XFDH XDV1
Rising edge of XRV input and decoder V123 is
X
X
X
vertical reference
Falling edge of XRV input and decoder V123 is
X
X
X
vertical reference
XRV is a V-sync or V gate signal
X
X
0
XRV is a frame sync, V pulses are generated
internally on both edges of FS input
X
X
1
X port field ID is state of XRH at reference edge on X
0
X
XRV (defined by XFDV)
Field ID (decoder and X port field ID) is inverted
X
1
X
Reference edge for field detection is falling edge of 0
X
X
XRV
Reference edge for field detection is rising edge of 1
X
X
XRV
XDV0
0
1
X
X
X
X
X
X
[1] X = don’t care.
Table 207. X port input reference signal definitions; register set A [92h[3:0]] and
B [C2h[3:0]]^[1]
X port input reference signal definitions
Control bits 3 to 0
XCODE XDH
XDQ
XCLK input clock and XDQ input qualifier are needed X
X
X
Data rate is defined by XCLK only, no XDQ signal X
X
X
used
Data are qualified at XDQ input at logic 1
X
X
0
Data are qualified at XDQ input at logic 0
X
X
1
Rising edge of XRH input is horizontal reference
X
0
X
Falling edge of XRH input is horizontal reference
X
1
X
Reference signals are taken from XRH and XRV
0
X
X
Reference signals are decoded from EAV and SAV 1
X
X
XCKS
0
1
X
X
X
X
X
X
[1] X = don’t care.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
165 of 208