SAA7108AE Datasheet, PDF (22/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
For each direction, there are 2 registers controlling the position of the cursor, one controls
the position of the ‘hot spot’, the other register controls the insertion position. The hot spot
is the ‘tip’ of the pointer arrow. It can have any position in the bit map. The actual position
registers describe the co-ordinates of the hot spot. Again 0,0 is the upper left corner.
While it is not possible to move the hot spot beyond the left respectively upper screen
border, this is perfectly legal for the right respectively lower border. It should be noted that
the cursor position is described relative to the input resolution.
Table 7.
Byte
0
1
2
...
6
7
...
254
255
Cursor bit map
D7
D6
row 0 column 3
row 0 column 7
row 0 column 11
...
row 0 column 27
row 0 column 31
...
row 31 column 27
row 31 column 31
D5
D4
row 0 column 2
row 0 column 6
row 0 column 10
...
row 0 column 26
row 0 column 30
...
row 31 column 26
row 31 column 30
D3
D2
row 0 column 1
row 0 column 5
row 0 column 9
...
row 0 column 25
row 0 column 29
...
row 31 column 25
row 31 column 29
D1
D0
row 0 column 0
row 0 column 4
row 0 column 8
...
row 0 column 24
row 0 column 28
...
row 31 column 24
row 31 column 28
Table 8. Cursor modes
Cursor pattern Cursor mode
CMODE = 0
00
second cursor color
01
first cursor color
10
transparent
11
inverted input
CMODE = 1
second cursor color
first cursor color
transparent
auxiliary cursor color
8.5 RGB Y-C_B-C_R matrix
RGB input signals to be encoded to PAL or NTSC are converted to the Y-C_B-C_R color
space in this block. The color difference signals are fed through low-pass filters and
formatted to a ITU-R BT.601 like 4 : 2 : 2 data stream for further processing.
A gain adjust option corrects the level swing of the graphics world (black-to-white as
0 to 255) to the required range of 16 to 235.
The matrix and formatting blocks can be bypassed for Y-C_B-C_R graphics input.
When the auxiliary VGA mode is selected, the output of the cursor insertion block is
immediately directed to the triple DAC.
8.6 Horizontal scaler
The high quality horizontal scaler operates on the 4 : 2 : 2 data stream. Its control engines
compensate the color phase offset automatically.
The scaler starts processing after a programmable horizontal offset and continues with a
number of input pixels. Each input pixel is a programmable fraction of the current output
pixel (XINC/4096). A special case is XINC = 0, this sets the scaling factor to 1.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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