SAA7108AE Datasheet, PDF (176/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 234. Data slicer start setup values …continued
Subaddress Register function
(hexadecimal)
Bit name^[1]
Values (binary)
Start
7 6 5 4 3 2 1 0 ^{(hexadecimal)}
5B
field offset and MSBs for
FOFF, RECODE, X, VOFF8, X, 1 0 0 0 0 0 1 1 83^[2]
horizontal and vertical offset HOFF10 to HOFF8
5C
reserved
X, X, X, X, X, X, X, X
0 0 0 0 0 0 0 0 00
5D
header and data identification FVREF, X, DID5 to DID0
0 0 1 1 1 1 1 0 3E
code control
5E
sliced data identification code X, X, SDID5 to SDID0
0 0 0 0 0 0 0 0 00
5F
reserved
X, X, X, X, X, X, X, X
0 0 0 0 0 0 0 0 00
60
slicer status byte 0
-, FC8V, FC7V, VPSV, PPV, CCV, read only register
-, -
61
slicer status byte 1
-, -, F21_N, LN8 to LN4
read only register
62
slicer status byte 2
LN3 to LN0, DT3 to DT0
read only register
[1] All X values must be set to logic 0.
[2] Changes for 50 Hz/625 line systems: subaddress 5Ah = 03h and subaddress 5Bh = 03h.
12.4 Scaler and interfaces
Table 235 shows some examples for the scaler programming with:
• prsc = prescale ratio
• fisc = fine scale ratio
• vsc = vertical scale ratio
The ratio is defined as: _n--ⁿ--_u--^u-_m--^m---_b--^b-_e--^e-_r--^r---_o--^o-_f--^f---_o--ⁱ--_un---_tp--_p--^u-_u--^t--_t--^p--_p--ⁱ-_i-^x--_x-^e--_e-^l-_l
In the following settings the VBI data slicer is inactive. To activate the VBI data slicer,
VITX[1:0] 86h[7:6] has to be set to ‘11’. Depending on the VBI data slicer settings, the
sliced VBI data is inserted after the end of the scaled video lines, if the regions of VBI data
slicer and scaler overlaps.
To compensate the running-in of the vertical scaler, the vertical input window lengths are
extended by 2 lines to 290 lines, respectively 242 lines for XS, but the scaler increment
calculations are done with 288 lines, respectively 240 lines.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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