SAA7108AE Datasheet, PDF (64/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
2. Input from X port: 60 Hz, 720 pixel, 240 lines, 8-bit data at 27 MHz data rate
(ITU 656), 2 cycles per pixel; output via I + H port: 16-bit data at 27 MHz clock,
1 cycle per pixel; the maximum HV_zoom is equal to:
0.98 × ¹---₇-⁶--₂-^.-⁶-₀--⁶--_×-⁶----₂-^m--₄---^s0----^–-_×---²--₁-²---_×--^×---₃--⁶-₇--⁴---_n--^µ-_s---^s = 2.34
The video scaler receives its input signal from the video decoder or from the expansion
port (X port). It gets 16-bit Y-C_B-C_R 4 : 2 : 2 input data at a continuous rate of 13.5 MHz
from the decoder. A discontinuous data stream can be accepted from the expansion port
(X port), normally 8-bit wide ITU 656 such as Y-C_B-C_R data, accompanied by a pixel
qualifier on XDQ.
The input data stream is sorted into two data paths, one for luminance (or raw samples)
and one for time-multiplexed chrominance C_B and C_R samples. A Y-C_B-C_R 4 : 1 : 1 input
format is converted to 4 : 2 : 2 for the horizontal prescaling and vertical filter scaling
operation.
The scaler operation is defined by two programming pages A and B, representing two
different tasks, that can be applied field alternating or to define two regions in a field (e.g.
with different scaling range, factors and signal source during odd and even fields).
Each programming page contains control for:
• Signal source selection and formats
• Task handling and trigger conditions
• Input and output acquisition window definition
• H-prescaler, V-scaler and H-phase scaling
Raw VBI data is handled as a specific input format and needs its own programming page
(equals own task).
In VBI pass through operation the processing of prescaler and vertical scaling has to be
disabled, however, the horizontal fine scaling VPD can be activated. Upscaling
(oversampling, zooming), free of frequency folding, up to a factor of 3.5 can be achieved,
as required by some software data slicing algorithms.
These raw samples are transported through the image port as valid data and can be
output as Y only format. The lines are framed by SAV and EAV codes.
9.3.1 Acquisition control and task handling (subaddresses 80h, 90h, 91h,
94h to 9Fh and C4h to CFh)
The acquisition control receives horizontal and vertical synchronization signals from the
decoder section or from the X port. The acquisition window is generated via pixel and line
counters at the appropriate places in the data path. From X port only qualified pixels and
lines (lines with qualified pixel) are counted.
The acquisition window parameters are as follows:
• Signal source selection regarding input video stream and formats from the decoder, or
from the X port (programming bits SCSRC[1:0] 91h[5:4] and FSC[2:0] 91h[2:0])
Remark: The input of raw VBI data from the internal decoder should be controlled via
the decoder output formatter and the LCR registers; see Section 9.2
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
64 of 208