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SAA7108AE Datasheet, PDF (109/208 Pages) NXP Semiconductors – HD-CODEC
NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 59. Input path control register, subaddress 37h, bit description
Legend: * = default value after reset.
Bit
Symbol Access Value Description
7
-
R/W 0
must be programmed with logic 0 to ensure compatibility to
future enhancements
6
YUPSC R/W
vertical scaler
0* normal operation
1
upscaling is enabled
5 and 4 YFIL[1:0] R/W
vertical interpolation filter control; the filter is not available if
YUPSC = 1
00* no filter active
01 filter is inserted before vertical scaling
10 filter is inserted after vertical scaling; YSKIP should be
logic 0
11 reserved
3
-
R/W 0
must be programmed with logic 0 to ensure compatibility to
future enhancements
2
CZOOM R/W
cursor generator
0* normal operation
1
cursor will be zoomed by a factor of 2 in both directions
1
IGAIN R/W
expected input level swing is
0* 16 to 235 (8-bit RGB)
1
0 to 255 (8-bit RGB)
0
XINT R/W
interpolation filter for horizontal upscaling
0* not active
1
active
Table 60. Gain luminance for RGB register, subaddress 38h, bit description
Legend: * = default value after reset.
Bit
Symbol Access Value Description
7 to 5 -
R/W 0
must be programmed with logic 0 to ensure compatibility to
future enhancements
4 to 0 GY[4:0] R/W -
Gain luminance of RGB (CR, Y and CB) output, ranging from
(1 − 16⁄32) to (1 + 15⁄32). Suggested nominal value = 0,
depending on external application.
Table 61. Gain color difference for RGB register, subaddress 39h, bit description
Legend: * = default value after reset.
Bit
Symbol Access Value Description
7 to 5 -
R/W 0
must be programmed with logic 0 to ensure compatibility to
future enhancements
4 to 0 GCD[4:0] R/W -
Gain color difference of RGB (CR, Y and CB) output, ranging
from (1 − 16⁄32) to (1 + 15⁄32). Suggested nominal value = 0,
depending on external application.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
109 of 208