SAA7108AE Datasheet, PDF (122/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 98. Sync control register, subaddress 97h, bit description …continued
Bit
Symbol Access Value Description
2
PVS
R/W
polarity of signal at pin VSVGC in output mode (Master
mode) is
0
active HIGH; rising edge of the input signal is used in Slave
mode
1
active LOW; falling edge of the input signal is used in Slave
mode
1
OHS
R/W
pin HSVGC is
0
input
1
active output
0
PHS
R/W
polarity of signal at pin HSVGC in output mode (Master
mode) is
0
active HIGH; rising edge of the input signal is used in Slave
mode
1
active LOW; falling edge of the input signal is used in Slave
mode
Table 99. Line length register, subaddress 98h, bit description
Bit Symbol Description
7 to 0 HLEN[7:0] with HLEN[11:8] (see Table 100) horizontal length;
HLEN = ^{n---u---m-----b---e--r----o---f---P----I--X----C----L---K----s-} – 1
line
Table 100. Input delay, MSB line length register, subaddress 99h, bit description
Bit Symbol Description
7 to 4 IDEL[3:0] input delay; defines the distance in PIXCLKs between the active edge of
CBO and the first received valid pixel
3 to 0 HLEN[11:8] see Table 99
Table 101. Horizontal increment register, subaddress 9Ah, bit description
Bit Symbol Description
7 to 0 XINC[7:0] with XINC[11:8] (see Table 103) incremental fraction of the horizontal
n----u---m----b---e---r---o---f----o---u---t-p---u---t----p---i-x---e---l-s-
scaling engine; XINC = --_n--_--_--_-u-_--_--_-m-_--_--_--_-b-_--_--_--_e--_--_-r-_--_--_--_o--_--_--^llf--_-ii-_--^nn-i-_--_n--^ee--_--_p--_--_--_u--_--_--_t--_--_--_p--_--_--_-i-_--_x--_--_-e-_--_--_-l-_--_s--- × 4096
Table 102. Vertical increment register, subaddress 9Bh, bit description
Bit Symbol Description
7 to 0 YINC[7:0] with YINC[11:8] (see Table 103) incremental fraction of the vertical scaling
engine;
YINC
=
n----u---m----b---e---r---o---f----a---c--t--i--v--e----o----u---t-p---u---t---l--i--n---e--s-
number of active input lines
×
4096
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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