SAA7108AE Datasheet, PDF (160/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 192. X port signal definitions text slicer; global set 85h[7:5]^[1]
X port signal definitions text slicer
Control bits 7 to 5
ISWP1 ISWP0 ILLV
Video data limited to range 1 to 254
X
X
0
Video data limited to range 8 to 247
X
X
1
Double word byte swap, influences serial output timing
D0 D1 D2 D3 ⇒ FF 00 00 SAV C_B0 Y0 C_R0 Y1
D1 D0 D3 D2 ⇒ 00 FF SAV 00 Y0 C_B0 Y1 C_R0
D2 D3 D0 D1 ⇒ 00 SAV FF 00 C_R0 Y1 C_B0 Y0
D3 D2 D1 D0 ⇒ SAV 00 00 FF Y1 C_R0 Y0 C_B0
0
0
X
0
1
X
1
0
X
1
1
X
[1] X = don’t care.
Table 193. I port reference signal polarities; global set 85h[4:0]^[1]
I port reference signal polarities
Control bits 4 to 0
IG0P IG1P IRVP
IDQ at default polarity (1 = active)
X
X
X
IDQ is inverted
X
X
X
IGPH at default polarity (1 = active)
X
X
X
IGPH is inverted
X
X
X
IGPV at default polarity (1 = active)
X
X
0
IGPV is inverted
X
X
1
IGP1 at default polarity
X
0
X
IGP1 is inverted
X
1
X
IGP0 at default polarity
0
X
X
IGP0 is inverted
1
X
X
[1] X = don’t care.
IRHP
X
X
0
1
X
X
X
X
X
X
IDQP
0
1
X
X
X
X
X
X
X
X
Table 194. I port FIFO flag control and arbitration; global set 86h[7:4]^[1]
Function
Control bits 7 to 4
VITX1 VITX0 IDG02
See subaddress 84h: IDG11 and IDG10
X
X
X
X
X
X
See subaddress 84h: IDG01 and IDG00
X
X
0
X
X
1
I port signal definitions
I port data output inhibited
0
0
X
Only video data is transferred
0
1
X
Only text data is transferred (no EAV, SAV will occur)
1
0
X
Text and video data is transferred, text has priority
1
1
X
IDG12
0
1
X
X
X
X
X
X
[1] X = don’t care.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
160 of 208