SAA7108AE Datasheet, PDF (14/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
Table 4.
Symbol
RTS0
ASCLK
XPD5
XPD4
XPD3
V_DDId
XRV
V_SSEd
V_DDEd
V_DDXd
V_DDEd
RTS1
V_DDId
SDAd
RTCO
LLC2
XPD2
XPD1
XCLK
XDQ
TMSd
TCKd
V_SSAd
V_DDAd
V_DDAd
AOUT
SCLd
RESd
V_SSEd
LLC
XPD0
XRH
XRDY
TRSTd
TDOd
TDId
V_SSAd
V_SSAd
Pin description …continued
Pin
Type^[1]
K13
O
K14
O
L1
I/O
L2
I/O
L3
I/O
L4
S
L5
I/O
L6
S
L7
S
L8
S
L9
S
L10
O
L11
S
L12
I/O
L13
(I/)O
L14
O
M1
I/O
M2
I/O
M3
I/O
M4
I/O
M5
I/pu
M6
I/pu
M7
S
M8
S
M9
S
M10 O
M11 I(/O)
M12 O
M13 S
M14 O
N1
I/O
N2
I/O
N3
O
N4
I/pu
N5
O
N6
I/pu
N7
S
N8
S
Description
real-time status or sync information line 0
audio serial clock output
MSB − 2 of XPD bus
MSB − 3 of XPD bus
MSB − 4 of XPD bus
3.3 V digital supply voltage for core (decoder)
vertical reference for XPD bus
digital ground for peripheral cells (decoder)
3.3 V digital supply voltage for peripheral cells (decoder)
3.3 V supply voltage for oscillator (decoder)
3.3 V digital supply voltage for peripheral cells (decoder)
real-time status or sync information line 1
3.3 V digital supply voltage for core (decoder)
serial data input/output (I²C-bus decoder)
real-time control output; contains information about actual system clock
frequency, field rate, odd/even sequence, decoder status, subcarrier frequency
and phase and PAL sequence (see external document “How to use Real Time
Control (RTC)”, available on request); the RTCO pin^[5][7] is enabled via I²C-bus
bit RTCE; see Table 162
line-locked ¹â„₂ clock output (13.5 MHz nominal)
MSB − 5 of XPD bus
MSB − 6 of XPD bus
clock for XPD bus
data qualifier for XPD bus
test mode select input for BST (decoder)^[4]
test clock input for BST (decoder)^[4]
analog ground (decoder)
3.3 V analog supply voltage (decoder)
3.3 V analog supply voltage (decoder)
do not connect; analog test output
serial clock input (I²C-bus decoder) with inactive output path
reset output signal; active LOW (decoder)
digital ground for peripheral cells (decoder)
line-locked clock output (27 MHz nominal)
MSB − 7 of XPD bus
horizontal reference for XPD bus
data input ready for XPD bus
test reset input for BST (decoder); active LOW; with internal pull-up^[2][3]
test data output for BST (decoder)^[4]
test data input for BST (decoder)^[4]
analog ground (decoder)
analog ground (decoder)
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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