SAA7108AE Datasheet, PDF (42/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
ANALOG INPUT
ADC
NO BLANKING ACTIVE
1
0
VBLK
<- CLAMP
1
0
HCL
GAIN ->
1
0
HSY
1
0
< CLL
0
1
< SBOT
1
0
> WIPE
+ CLAMP
− CLAMP NO CLAMP + GAIN
WIPE = white peak level (254).
SBOT = sync bottom level (1).
CLL = clamp level [60 Y (128 C)].
HSY = horizontal sync pulse.
HCL = horizontal clamp pulse.
Fig 18. Clamp and gain flow
− GAIN fast − GAIN
slow + GAIN
mgc647
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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