SAA7108AE Datasheet, PDF (180/208 Pages) NXP Semiconductors – HD-CODEC

NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
13. Limiting values
Table 237. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All ground pins connected
together and grounded (0 V); all supply pins connected together.
Symbol Parameter
Conditions
Min Max
Unit
V_DDD
V_DDA
V_i(A)
V_i(n)
digital supply voltage
analog supply voltage
input voltage at analog inputs
input voltage at pins XTALI, SDA
and SCL
−0.5 +4.6
V
−0.5 +4.6
V
−0.5 +4.6
V
−0.5 V_DDD + 0.5 V
V_i(D)
input voltage at digital inputs or outputs in 3-state
−0.5 +4.6
V
I/O pins
outputs in 3-state ^[1] −0.5 +5.5
V
∆V_SS
T_stg
T_amb
V_esd
voltage difference between
V_SSA(n) and V_SSE(n) or V_SSI(n)
storage temperature
ambient temperature
electrostatic discharge voltage
human body
model
-
100
mV
−65 +150
°C
0
70
°C
[2] _-
±2 000
V
machine model
[3] _-
±150
V
[1] Condition for maximum voltage at digital inputs or I/O pins: 3.0 V < V_DDD < 3.6 V.
[2] Class 2 according to JESD22-A114D.
[3] Class A according to EIA/JESD22-A115-A.
14. Thermal characteristics
Table 238. Thermal characteristics
Symbol Parameter
R_th(j-a)
thermal resistance from junction
to ambient
Conditions
in free air
Typ
32^[1]
Unit
K/W
[1] The overall R_th(j-a) value can vary depending on the board layout. To minimize the effective R_th(j-a) all power
and ground pins must be connected to the power and ground layers directly. An ample copper area directly
under the SAA7108AE; SAA7109AE with a number of through-hole plating, connected to the ground layer
(four-layer board: second layer), can also reduce the effective R_th(j-a). Please do not use any solder-stop
varnish under the chip. In addition the usage of soldering glue with a high thermal conductance after curing
is recommended.
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
180 of 208