XC3S5000-5FGG676C Datasheet, PDF (91/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: DC and Switching Characteristics
Table 54: Synchronous 18 x 18 Multiplier Timing
Symbol
Description
P Outputs
Clock-to-Output Times
T_MULTCK
When reading from the
Multiplier, the time from the
active transition at the C clock
input to data appearing at the P
outputs
Setup Times
T_MULIDCK
Hold Times
T_MULCKID
Time from the setup of data at
the A and B inputs to the active
transition at the C input of the
Multiplier
Time from the active transition
at the Multiplier’s C input to the
point where data is last held at
the A and B inputs
P[0]
P[15]
P[17]
P[19]
P[23]
P[31]
P[35]
-
-
Speed Grade
-5
-4
Min
Max
Min
Max
–
1.00
–
1.15
–
1.15
–
1.32
–
1.30
–
1.50
–
1.45
–
1.67
–
1.76
–
2.02
–
2.37
–
2.72
–
2.67
–
3.07
1.84
–
2.11
–
0
–
0
–
Notes:
1. The numbers in this table are based on the operating conditions set forth in Table 32.
Table 55: Asynchronous 18 x 18 Multiplier Timing
Symbol
Description
P Outputs
Propagation Times
T_MULT
The time it takes for data to travel from the A and B inputs
to the P outputs
P[0]
P[15]
P[17]
P[19]
P[23]
P[31]
P[35]
Notes:
1. The numbers in this table are based on the operating conditions set forth in Table 32.
Speed Grade
-5
-4
Max
Max
1.55
1.78
3.15
3.62
3.36
3.86
3.49
4.01
3.73
4.29
4.23
4.86
4.47
5.14
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
91