XC3S5000-5FGG676C Datasheet, PDF (78/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: DC and Switching Characteristics
Table 47: Output Timing Adjustments for IOB (Cont’d)
Convert Output Time from LVCMOS25 with 12mA Drive and Fast Slew Rate to the
Following Signal Standard (IOSTANDARD)
LVCMOS18
LVDCI_18
LVDCI_DV2_18
LVCMOS25
LVDCI_25
LVDCI_DV2_25
Slow
Fast
Slow
Fast
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
Add the Adjustment Below
Speed Grade
-5
-4
5.49
6.31
3.45
3.97
2.84
3.26
2.62
3.01
2.11
2.43
2.07
2.38
2.50
2.88
1.15
1.32
0.96
1.10
0.87
1.01
0.79
0.91
0.76
0.87
0.81
0.94
0.67
0.77
6.43
7.39
4.15
4.77
3.38
3.89
2.99
3.44
2.53
2.91
2.50
2.87
2.22
2.55
3.27
3.76
1.87
2.15
0.32
0.37
0.19
0.22
0
0
–0.02
–0.01
–0.04
–0.02
0.27
0.31
0.16
0.19
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
78