XC3S5000-5FGG676C Datasheet, PDF (128/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: Pinout Descriptions
Mechanical Drawings
Detailed mechanical drawings for each package type are available from the Xilinx website at the specified location in
Table 83.
Material Declaration Data Sheets (MDDS) are also available on the Xilinx website for each package.
Table 83: Xilinx Package Mechanical Drawings
Package
Web Link (URL)
VQ100 and VQG100
CP132 and CPG132⁽¹⁾
http://www.xilinx.com/support/documentation/package_specs/vq100.pdf
http://www.xilinx.com/support/documentation/package_specs/cp132.pdf
TQ144 and TQG144
http://www.xilinx.com/support/documentation/package_specs/tq144.pdf
PQ208 and PQG208
http://www.xilinx.com/support/documentation/package_specs/pq208.pdf
FT256 and FTG256
http://www.xilinx.com/support/documentation/package_specs/ft256.pdf
FG320 and FGG320
http://www.xilinx.com/support/documentation/package_specs/fg320.pdf
FG456 and FGG456
http://www.xilinx.com/support/documentation/package_specs/fg456.pdf
FG676 and FGG676
http://www.xilinx.com/support/documentation/package_specs/fg676.pdf
FG900 and FGG900
FG1156 and FGG1156⁽¹⁾
http://www.xilinx.com/support/documentation/package_specs/fg900.pdf
http://www.xilinx.com/support/documentation/package_specs/fg1156.pdf
Notes:
1. The CP132, CPG132, FG1156, and FGG1156 packages are discontinued. See
http://www.xilinx.com/support/documentation/spartan-3_customer_notices.htm.
Power, Ground, and I/O by Package
Each package has three separate voltage supply inputs—VCCINT, VCCAUX, and VCCO—and a common ground return,
GND. The numbers of pins dedicated to these functions varies by package, as shown in Table 84.
Table 84: Power and Ground Supply Pins by Package
Package
VCCINT
VQ100
4
CP132⁽¹⁾
4
TQ144
4
PQ208
4
FT256
8
FG320
12
FG456
12
FG676
20
FG900
32
FG1156⁽¹⁾
40
VCCAUX
4
4
4
8
8
8
8
16
24
32
VCCO
8
12
12
12
24
28
40
64
80
104
GND
10
12
16
28
32
40
52
76
120
184
Notes:
1. The CP132, CPG132, FG1156, and FGG1156 packages are discontinued. See
http://www.xilinx.com/support/documentation/spartan-3_customer_notices.htm.
A majority of package pins are user-defined I/O pins. However, the numbers and characteristics of these I/O depends on the
device type and the package in which it is available, as shown in Table 85. The table shows the maximum number of
single-ended I/O pins available, assuming that all I/O-, DUAL-, DCI-, VREF-, and GCLK-type pins are used as
general-purpose I/O. Likewise, the table shows the maximum number of differential pin-pairs available on the package.
Finally, the table shows how the total maximum user I/Os are distributed by pin type, including the number of
unconnected—i.e., N.C.—pins on the device.
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
128